A Very Compact Hardware Implementation of the MISTY1 Block Cipher-Reference-Cited by-同舟云学术

A Very Compact Hardware Implementation of the MISTY1 Block Cipher

Published: Issue: Volume: Page:315-330
ISSN:0302-9743
Container-title:Cryptographic Hardware and Embedded Systems – CHES 2008
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Author:

Yamamoto Dai,Yajima Jun,Itoh Kouichi

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-540-85053-3_20.pdf

Reference18 articles.

1. Lecture Notes in Computer Science;M. Matsui,1997

2. ISO/IEC18033-3, http://www.iso.org/iso/iso_catalogue/catalogue_tc/catalogue_detail.htm?csnumber=37972

3. Ichikawa, T., Sorimachi, T., Matsui, M.: A Study on Hardware Design for Block Encryption Algorithms. In: Proc. 1997 Symposium on Cryptography and Information Security, SCIS1997, 9. D (January 1997) (written in Japanese)

4. Ichikawa, T., Katoh, J., Matsui, M.: An Implementation of MISTY1 for H/W Design. In: Proc. 1998 Symposium on Cryptography and Information Security, SCIS 1998, 9.1.A (January 1998) (written in Japanese)

5. Sugawara, T., Homma, N., Aoki, T., Satoh, A.: ASIC Performance Comparison for the ISO Standard Block Ciphers. In: Proc. 2007 Joint Workshop on Information Security, JWIS 2007, pp. 485–498 (August 2007)

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