1. Rajeev Alur, Thomas A. Henzinger, and Pei-Hsin Ho. Automatic symbolic verification of embedded systems. In Proceedings of the 14th Annual IEEE Real-Time Systems Symposium, pages 2–11. IEEE Computer Society Press, 1993.
2. Johan Bengtsson, Kim G. Larsen, Fredrik Larsson, Paul Pettersson, and Wang Yi. UPPAAL a tool suite for automatic verification of real–time systems. Technical Report RS-96-58, BRICS, Aalborg University, DENMARK and Department of Computer Systems, Uppsala University, Sweden, December 1996.
3. Adilson Luiz Bonifácio, Arnaldo Vieira Moura, João Batista Camargo Jr., and Jorge Rady Almeida Junior. Análise e Verificação de Segmentos de Via de uma Malha Metroviária. In Proceedings of the II Workshop on Formal Methods, pages 13–22, Florianópolis, Brazil, October 1999. (In Portuguese).
4. Adilson Luiz Bonifácio, Arnaldo Vieira Moura, João Batista Camargo Jr., and Jorge Rady Almeida Junior. Formal Parameters Synthesis for Track Segments of the Subway Mesh. In 7th Annual IEEE International Conference and Workshop on the Engineering of Computer Based Systems, pages 263–272, Edinburgh, Scotland, 3–7, April 2000. IEEE Computer Society Press.
5. 5. Adilson Luiz Bonifácio, Arnaldo Vieira Moura, João Batista Camargo Jr., and Jorge Rady Almeida Junior. Formal Verification and Synthesis for an Air Traffic Management System. Technical Report 05, Computing Institute, University of Campinas, Campinas, Brazil, February 2000.