A Small Chip Area Stochastic Calibration for TDC Using Ring Oscillator-Reference-Cited by-同舟云学术

A Small Chip Area Stochastic Calibration for TDC Using Ring Oscillator

Published:2014-11-05 Issue:6 Volume:30 Page:653-663
ISSN:0923-8174
Container-title:Journal of Electronic Testing
language:en
Short-container-title:J Electron Test

Author:

Katoh Kentaroh,Kobayashi Yutaro,Chujo Takeshi,Wang Junshan,Li Ensi,Li Congbing,Kobayashi Haruo

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Link

http://link.springer.com/content/pdf/10.1007/s10836-014-5486-0.pdf

Reference15 articles.

1. Chang YC, Huang SY, Tzeng CW, Yao J (2011) A fully cell-based design for timing measurement of memory. Proceedings International Test Conference (ITC’11) pp 1–10

2. Chujyo T, Hirabayashi D, Katoh K, Li C, Li E, Kobayashi Y, Wang J, Sato K, Kobayashi H (2014), Experimental verification of flash-type TDC with histogram method self-calibration. Proceedings IEE Electrical Circuit Research Meeting (ECT-14-006) pp 1–6

3. Hirabayashi D, Arakawa Y, Kawauchi S, Ishii M, Uemori S, Sato K, Kobayashi H, Niitsu K, Takai N (2012), Built-out self-test circuit for digital signal timing. Proceedings IEE Electrical Circuit Research Meeting (ECT-12-069) pp 1–6

4. Ito S, Nishimura S, Kobayashi H, Takai N , Vernier stochastic TDC architecture with self-calibration. Proceedings 4th international conference on Advanced Micro-Device Engineering (AMDE’12) pp 1–4 (2010)

5. Katoh K, Namba K, Ito H (2010), A low-area on-chip delay measurement system using embedded delay measurement circuit. Proceedings IEEE Asian Test Symposium (ATS’10) pp 343– 348

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