A Low-Cost Test Solution for Reliable Communication in Networks-on-Chip-Reference-Cited by-同舟云学术

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A Low-Cost Test Solution for Reliable Communication in Networks-on-Chip

Published:2019-04 Issue:2 Volume:35 Page:215-243
ISSN:0923-8174
Container-title:Journal of Electronic Testing
language:en
Short-container-title:J Electron Test

Author:

Bhowmik Biswajit^ORCID,Biswas Santosh,Deka Jatindra Kumar,Bhattacharya Bhargab B.

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Link

http://link.springer.com/content/pdf/10.1007/s10836-019-05792-1.pdf

Reference65 articles.

1. Agrawal M, Chakrabarty K (2014) Test-time optimization in noc-based manycore socs using multicast routing. In: Proceedings of the 2014 IEEE 32nd VLSI test symposium (VTS), pp 1–6

2. Aisopos K, DeOrio A, Peh LS, Bertacco V (2011) Ariadne: agnostic reconfiguration in a disconnected network environment. In: Proceedings of the international conference on parallel architectures and compilation techniques, pp 298–309

3. Alaghi A, Karimi N, Sedghi M, Navabi Z (2007) Online noc switch fault detection and diagnosis using a high level fault model. In: Proceedings of the 22nd IEEE international symposium on defect and fault-tolerance in VLSI systems (DFT), pp 21–29

4. Amory A, Briao E, Cota E, Lubaszewski M, Moraes F (2005) A scalable test strategy for network-on-chip routers. In: Proceedings of the 2005 IEEE international test conference, pp 9–599

5. Avresky DR, Shurbanov V, Horst RW, Mehra P (1999) Performance evaluation of the servernet r san under self-similar traffic. In: Proceedings of the 13th international symposium on parallel processing and the 10th symposium on parallel and distributed processing, IPPS’99/SPDP’99 . IEEE Computer Society, Washington, pp 143–147

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1. Design of a Fault-Tolerant Pseudo-3D Routing;2023 IEEE International Test Conference India (ITC India);2023-07-23

2. An IP Core of AMBA Bus Interface in HDL;ITM Web of Conferences;2022

3. Selective Fault-Masking for Improving Yield and Performance of On-Chip Networks;2021 IEEE International Conference on Systems, Man, and Cybernetics (SMC);2021-10-17

4. Dugdugi: An Optimal Fault Addressing Scheme for Octagon-Like On-Chip Communication Networks;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-05

5. BiSuT: A NoC-Based Bit-Shuffling Technique for Multiple Permanent Faults Mitigation;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021

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