Automation of Test Program Synthesis for Processor Post-silicon Validation
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
http://link.springer.com/article/10.1007/s10836-018-5709-x/fulltext.html
Reference16 articles.
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3. Corno F, Cumani G, Reorda MS, Squillero G (2000) An RT-level fault model with high gate level correlation. In: Proceedings of the IEEE international high-level design validation and test workshop, pp 3–8
4. Corno F, Sánchez E, Reorda MS, Squillero G (2004) Automatic test program generation: a case study. IEEE Des Test Comput 21(2):102–109
5. Corno F, Sánchez E, Squillero G (2005) Evolving assembly programs: how games help microprocessor validation. IEEE Trans Evol Comput 9(6):695–706
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