Design of High Speed Error Tolerant Adder Using Gate Diffusion Input Technique
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
http://link.springer.com/content/pdf/10.1007/s10836-019-05802-2.pdf
Reference32 articles.
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3. Andrew B, Seokhyeong K (2012) Accuracy-configurable adder for approximate arithmetic designs. Proc. Des Aut Con San Francisco, CA, USA. https://doi.org/10.1145/2228360.2228509
4. Alioto M, Palumbo G (2002) Analysis and comparison of the full adder block. IEEE T VLSI Syst 10(6):806–823
5. Shoba M, Nakkeeran R (2016) GDI based full adders for energy efficient arithmetic applications. Engineering Science and Technology Int J 19:485–496
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