High Speed Error Tolerant Adder for Multimedia Applications-Reference-Cited by-同舟云学术

High Speed Error Tolerant Adder for Multimedia Applications

Published:2017-08-26 Issue:5 Volume:33 Page:675-688
ISSN:0923-8174
Container-title:Journal of Electronic Testing
language:en
Short-container-title:J Electron Test

Author:

Geetha S.^ORCID,Amritvalli P.

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Link

http://link.springer.com/article/10.1007/s10836-017-5680-y/fulltext.html

Reference41 articles.

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3. Cong L, Jie H, Fabrizio L (2015) An analytical framework for evaluating the error characteristics of approximate adders. IEEE Trans Comput 64(5):1268–1281. doi: 10.1109/TC.2014.2317180

4. Darjn E, Gerardo C, Davide DC, Ettore N, Nicola P, Antonio GM (2016) Approximate adder with output correction for error tolerant applications and Gaussian distributed inputs. Proc IEEE Int Symp Circuits Sys:1970–1973. doi: 10.1109/ISCAS.2016.7538961

5. Garg B, Dutt S, Sharma GK (2016) Bit-width-aware constant-delay run-time accuracy programmable adder for error-resilient applications. Microelectron J 50:1–7

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