An Effective and Accurate Methodology for the Cell Internal Defect Diagnosis
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
http://link.springer.com/content/pdf/10.1007/s10836-010-5181-8.pdf
Reference31 articles.
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3. Champac VC, Figueras J (1995) Testability of floating gate defects in sequential circuits. Proc VLSI Test Symposium 202–207. doi: 10.1109/VTEST.1995.512638
4. Champac V, Rubio A, Figueras J (1994) Electrical model of the floating gate defect in CMOS IC’s: implications on IDDQ testing. IEEE Trans CAD 359–356. doi: 10.1109/43.265677
5. Desineni R et al (2006) A logic diagnosis methodology for improved localization and extraction of accurate defect behavior. Proc Int Test conf doi: 10.1109/TEST.2006.297627
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