A Reliable Architecture for Parallel Implementations of the Advanced Encryption Standard
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
http://link.springer.com/content/pdf/10.1007/s10836-009-5106-6.pdf
Reference10 articles.
1. Advanced Encryption Standard (AES), Federal Information Processing Standards Publication 197, November 26, 2001.
2. Bertoni G, Breveglieri L, Koren I, Maistri P, Piuri V (2003) Error Analysis and Detection Procedures for a Hardware Implementation of the Advanced Encryption Standard. IEEE Trans Comput 52(4):492–505
3. Di Natale G, Flottes M-L, Rouzeyre B (2007) An On-Line Fault Detection Scheme for SBoxes in Secure Circuits. Proc. IEEE Int. On-Line Testing Symposium, pp 57–62
4. Di Natale G, Flottes M-L, Rouzeyre B (2008) An Integrated Validation Environment for Differential Power Analysis. IEEE International Symposium on Electronic Design, Test & Applications (DELTA 2008), Hong Kong, January, pp 527–532
5. Hellekalek P, Wegenkittl S (2003) Empirical evidence concerning AES. ACM Trans Model Comput Simul 13(4):322–333
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