High Performance Significance Approximation Error Tolerance Adder for Image Processing Applications
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering
Link
http://link.springer.com/content/pdf/10.1007/s10836-016-5587-z.pdf
Reference16 articles.
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4. Jayanthi AN, Ravichandran CS (2012) Design of error tolerant adder. Am J Appl Sci 9(6):818–824
5. V Muralidharan, M Jagadeeswari (2012) An enhanced Carry elimination adder for low power VLSI applications. Int J Eng Res Appl 2(2) 1477–1482
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