Area-efficient low-power image watermarking architecture using faithful approximation and reversible logic
Author:
Publisher
Springer Science and Business Media LLC
Link
https://link.springer.com/content/pdf/10.1007/s11042-024-19702-x.pdf
Reference44 articles.
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5. Biswaset Ashis Kumar, al. (2008) Efficient approaches for designing reversible Binary Coded Decimal adders. Microelectron J 39(12):1693–1703
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