Efficient Designs of Reversible Majority Voters

Author:

Kheirandish Davar,Haghparast MajidORCID,Reshadi Midia,Hosseinzadeh Mehdi

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Reference34 articles.

1. Arabzadeh M, Zamani M, Sedighi M, Saeedi M (2011) Logical-depth-oriented reversible logic synthesis. In Proceedings of the International Workshop on Logic and Synthesis

2. Babu HMH, Chowdhury AR (2005) Design of a reversible binary coded decimal adder by using reversible 4-bit parallel adder. In Proc. 18th international conference on VLSI design held jointly with 4th international conference on embedded systems (pp. 255-260). IEEE

3. Babu HMH, Islam MR, Chowdhury AR, Chowdhury SMA (2003) Reversible logic synthesis for minimization of full-adder circuit. In Proc. Euromicro symposium on digital system design (pp. 50-54). IEEE

4. Babu HMH, Mia MS, Biswas AK (2017) Efficient techniques for fault detection and correction of reversible circuits. J Electron Test 33(5):591–605

5. Bahar AN, Waheed S (2016) Design and implementation of an efficient single layer five input majority voter gate in quantum-dot cellular automata. SpringerPlus 5(636):1–10

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