Analysis of cache behaviour and software optimizations for faster on-chip network simulations
Author:
Funder
Department of Science and Technology, Government of India
Publisher
Springer Science and Business Media LLC
Subject
Strategy and Management,Safety, Risk, Reliability and Quality
Link
http://link.springer.com/content/pdf/10.1007/s13198-019-00799-5.pdf
Reference42 articles.
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2. Asaduzzaman A, Mahgoub I (2006) Cache modeling and optimization for portable devices running MPEG-4 video decoder. Multimed Tools Appl 28(2):239–256. https://doi.org/10.1007/s11042-006-6145-y
3. Ben-Itzhak Y, Zahavi E, Cidon I, Kolodny A, (2012) HNOCS: modular open-source simulator for heterogeneous NoCs. In: International conference on embedded computer systems (SAMOS), pp 51–57. https://doi.org/10.1109/SAMOS.2012.6404157
4. Binkert N, Beckmann B, Black G, Reinhardt SK, Saidi A, Basu A, Hestness J, Hower DR, Krishna T, Sardashti S, Sen R, Sewell K, Shoaib M, Vaish N, Hill MD, Wood DA (2011) The gem5 simulator. SIGARCH Comput Archit News 39(2):1–7. https://doi.org/10.1145/2024716.2024718
5. Catania V, Mineo A, Monteleone S, Palesi M, Patti D (2015) Noxim: an open, extensible and cycle-accurate network on chip simulator. In: 26th IEEE International conference on application-specific systems, architectures and processors, ASAP 2015, Toronto, ON, Canada, July 27–29, 2015, pp 162– 163. https://doi.org/10.1109/ASAP.2015.7245728
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