Realization of Video Object Plane Decoder on On-Chip Network Architecture

Author:

Nguyen Huy-Nam,Ngo Vu-Duc,Choi Hae-Wook

Publisher

Springer Berlin Heidelberg

Reference12 articles.

1. Guerrier, P., Grenier, A.: A generic architecture for on-chip packet-switched interconnection. In: Design automation and test in Europe conference, pp. 250–256 (August 2000)

2. Horowitz, M.A., et al.: The future of wires. Proceeding of IEEE 89(4), 490–504 (2001)

3. Benini, L., De Micheli, G.: Networks On Chips: A new SoC paradigm. IEEE computer (January 2002)

4. Petrini, F., Vanneschi, M.: Network performance under Physical Constrain. In: Proceedings of International Conference on Parallel Processing, pp. 34–43 (August 1997)

5. Leiserson, C.E.: Fat Trees: Universal networks for hardware efficient supercomputing. IEEE Transactions on Computer 34, 890–900 (1985)

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1. Deadlock Free Routing Algorithm for Minimizing Data Packet Transmission in Network on Chip;International Journal of Embedded and Real-Time Communication Systems;2012-01

2. Application-Specific Temperature Reduction Systematic Methodology for 2D and 3D Networks-on-Chip;Lecture Notes in Computer Science;2010

3. The Optimum Network on Chip Architectures for Video Object Plane Decoder Design;Parallel and Distributed Processing and Applications;2006

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