FPGA Logic Synthesis Using Quantified Boolean Satisfiability-Reference-Cited by-同舟云学术

FPGA Logic Synthesis Using Quantified Boolean Satisfiability

Published:2005 Issue: Volume: Page:444-450
ISSN:0302-9743
Container-title:Theory and Applications of Satisfiability Testing
language:
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Author:

Ling Andrew,Singh Deshanand P.,Brown Stephen D.

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/11499107_37

Reference11 articles.

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4. Cong, J., Peck, J., Ding, Y.: RASP: A general logic synthesis system for SRAM-based FPGAs. In: FPGA, pp. 137–143 (1996)

5. Corno, F., Reorda, M., Squillero, G.: RT-level ITC 99 benchmarks and first ATPG results (2000)

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