Author:
Battezzati Niccolò,Sterpone Luca,Violante Massimo
Cited by
19 articles.
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1. Interface Protection Against Transient Faults;2024 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems (DDECS);2024-04-03
2. On-Chip Bus Protection against Soft Errors;Electronics;2023-11-19
3. MTTR reduction of FPGA scrubbing: Exploring SEU sensitivity;Microprocessors and Microsystems;2023-09
4. Hardened Processor Architecture;2023 30th International Conference on Mixed Design of Integrated Circuits and System (MIXDES);2023-06-29
5. In-Pipeline Processor Protection against Soft Errors;Journal of Low Power Electronics and Applications;2023-05-10