Design and theoretical comparison of input ESD devices in 180 nm CMOS with focus on low capacitance

Author:

Michalowska-Forsyth Alicja,Schrey Patrick,Deutschmann Bernd

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Reference16 articles.

1. Ben Dhia, S., Ramdani, M., Sicard, E. (Eds.) (2006): Electromagnetic compatibility of integrated circuits, (pp. 189–200). ISBN 0-387-26600-3. New York: Springer.

2. Deutschmann, B., Sicard, E., Ben Dhia, S. (2006): On the effects of transient electromagnetic interference on integrated circuits. EDFA – Electron. Device Failure Anal., 8(4), 16–24.

3. Kelly, M., et al. (1995): A comparison of electrostatic discharge models and failure signatures for CMOS integrated circuit devices. In Proc. of EOS/ESD symposium 95-175 (pp. 4.2.1–4.2.11).

4. Schrey, P. (2016): ESD protection characterization by an extended Wunsch–Bell plot. In 12th conference on Ph.D. research in microelectronics and electronics (PRIME), Lisbon, 1–4.

5. Chang, T., et al. (2008): ESD-protected wideband CMOS LNAs using modified resistive feedback techniques with chip-on-board packaging. IEEE Trans. Microw. Theory Tech., 56(8), 1817–1826.

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