Compact modeling of through silicon vias for thermal analysis in 3-D IC structures-Reference-Cited by-同舟云学术

Compact modeling of through silicon vias for thermal analysis in 3-D IC structures

Published:2021-02-05 Issue:1 Volume:46 Page:
ISSN:0256-2499
Container-title:Sādhanā
language:en
Short-container-title:Sādhanā

Author:

PATIL CHANDRASHEKHAR V^ORCID,SUMA M S

Publisher

Springer Science and Business Media LLC

Subject

Multidisciplinary

Link

http://link.springer.com/content/pdf/10.1007/s12046-020-01549-1.pdf

Reference27 articles.

1. Moreau S and Bouchu D 2013 Reliability of Dual Damascene TSV for high dsity integration: the electromigration issue. In: Proceedings of the International Reliability Physics Symposium (IRPS)

2. DOrio R L, Ceric H and Selberherr S 2012 Electromigration failure in a copper dual-damascene structure with a through silicon via. Microelectron. Reliab.y 52(9–10): 1981–1986

3. Han K J, Swaminathan M and Bandyopadhyay T 2010 Electromagnetic modeling othrough-silicon vias (TSV) interconnections using cylindrical modal basis functions. IEEE Trans. Advanced Packag. 33(4): 804–817

4. Govind Singh S V and Chuan Seng Tan Nanyang Technologies University 2009 Thermal mitigation using thermal through silicon via (TTSV) 3-D ICs. In: Proceedings of Impact

5. Im. S and Banerjee 2000 Full chip thermal analysis of planar (2-D) and vertically integrated (3-D) high performance ICs. In: Proceedings of IEDM

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