NoC Post-Silicon Validation and Debug

Author:

Rout Sidhartha Sankar,Sinha Mitali,Deb Sujay

Publisher

Springer International Publishing

Reference45 articles.

1. L. Benini, G. De Micheli, Networks on chips: a new SoC paradigm. Computer 35(1), 70–78 (2002)

2. P. Mishra, R. Morad, A. Ziv, S. Ray Post-silicon validation in the soc era: a tutorial introduction. IEEE Des. Test 34(3), 68–92 (2017)

3. P. Jayaraman, R. Parthasarathi, A survey on post-silicon functional validation for multicore architectures. ACM Comput. Surv. (CSUR) 50(4), 1–30 (2017)

4. K. Goossens, B. Vermeulen, R. Van Steeden, M. Bennebroek, Transaction-based communication-centric debug, in Proceedings of the First International Symposium on Networks-on-Chip (NOCS’07) (IEEE, New York, 2007), pp. 95–106

5. N. Karimi, A. Alaghi, M. Sedghi, Z. Navabi, Online network-on-chip switch fault detection and diagnosis using functional switch faults. JUCS 14(22), 3716–3736 (2008)

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