A Survey on Post-Silicon Functional Validation for Multicore Architectures

Abstract

During a processor development cycle, post-silicon validation is performed on the first fabricated chip to detect and fix design errors. Design errors occur due to functional issues when a unit in a design does not meet its specification. The chances of occurrence of such errors are high when new features are added in a processor. Thus, in multicore architectures, with new features being added in core and uncore components, the task of verifying the functionality independently and in coordination with other units gains significance. Several new techniques are being proposed in the field of functional validation. In this article, we undertake a survey of these techniques to identify areas that need to be addressed for multicore designs. We start with an analysis of design errors in multicore architectures. We then survey different functional validation techniques based on hardware, software, and formal methods and propose a comprehensive taxonomy for each of these approaches. We also perform a critical analysis to identify gaps in existing research and propose new research directions for validation of multicore architectures.