Effective FPGA Architecture for General CRC

Author:

Kekely Lukáš,Cabal Jakub,Kořenek Jan

Publisher

Springer International Publishing

Reference15 articles.

1. Bajarangbali, Anand, P.A.: Design of high speed CRC algorithm for ethernet on FPGA using reduced lookup table algorithm. In: IEEE India Conference (2016)

2. Computer Architecture Group and Micron Foundation: OpenHMC: a configurable open-source hybrid memory cube controller. University of Heidelberg (2014)

3. Hamed, H.F.A., Elmisery, F., Elkader, A.A.H.A.: Implementation of low area and high data throughput CRC design on FPGA. Int. J. Adv. Res. Comput. Sci. Electron. Eng. 1(9) (2012)

4. Henriksson, T., Liu, D.: Implementation of fast CRC calculation. In: Proceedings of the Asia and South Pacific, Design Automatation Conference, pp. 563–564 (2003)

5. HMC Consortium: hybrid memory cube specification 2.1. Altera Corp. (2015)

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