1. Tian, X.: FPGA-based SHA-3 algorithm hardware implementation optimization and system design. Xidian University, (2019). Elissa, K.: Title of paper if known, unpublished
2. Jungk, B.: Evaluation of compact FPGA implementations for all SHA-3 finalists. In: Third SHA-3 Candidate Conference (March 2012)
3. Ding, D.: Design and Implementation of Five Candidate Algorithms of SHA-3 Based on FPGA. Xidian University (2012)
4. Baldwin, B., Byrne, A., Lu, L., Hamilto, M., Hanle, N., O'Neill, M., Marnan, W.P.: FPGA implementations of the round two SHA-3 candidates. FPL 2010, 400–407 (2010)
5. Gholipour, A., Mirzakuchaki, S.: High-speed implementation of the KECCAK Hash function on FPGA. Int. J. Adv. Comput. Sci. 2(8), 303–307 (2012)