Publisher
Springer International Publishing
Reference45 articles.
1. P. Benabes, M. Keramat, R. Kielbasa, A methodology for designing continuous-time Σ Δ modulators, in Proceedings European Design and Test Conference, EDTC 97 (1997), pp. 46–50
2. E.J. van der Zwan, E.C. Dijkmans, A 0.2 mW CMOS Σ Δ modulator for speech coding with 80 dB dynamic range. IEEE J. Solid State Circuits 31, 1873–1880 (1996)
3. L.J. Breems, R. Rutten, R.H.M. van Veldhoven, G. van der Weide, A 56 mW continuous-time quadrature cascaded Σ Δ modulator with 77 dB DR in a near zero-IF 20 MHz band. IEEE J. Solid State Circuits 42, 2696–2705 (2007)
4. Y. Dong, W. Yang, R. Schreier et al., A continuous-time 0–3 MASH ADC achieving 88 dB DR with 53 MHz BW in 28 nm CMOS. IEEE J. Solid State Circuits 49, 2868–2877 (2014)
5. L.J. Breems, E.C. Dijkmans, J.H. Huijsing, A quadrature data-dependent DEM algorithm to improve image rejection of a complex Σ Δ modulator. IEEE J. Solid State Circuits 36, 1879–1886 (2001)