Author:
Bernauer Andreas,Zeppenfeld Johannes,Bringmann Oliver,Herkersdorf Andreas,Rosenstiel Wolfgang
Reference24 articles.
1. Agarwal, A., Zolotov, V., Blaauw, D.T.: Statistical clock skew analysis considering intra-die process variations. IEEE CAD 23(8), 1231–1242 (2004)
2. Bernauer, A., Bringmann, O., Rosenstiel, W.: Generic self-adaptation to reduce design effort for system-on-chip. In: IEEE SASO, pp. 126–135 (2009)
3. Bernauer, A., Fritz, D., Rosenstiel, W.: Evaluation of the learning classifier system XCS for SoC run-time control. In: LNI, vol. 134, pp. 761–768. Springer, Berlin (2008)
4. Bernstein, K., Frank, D., Gattiker, A., Haensch, W., Ji, B., Nassif, S., Nowak, E., Pearson, D., Rohrer, N.: High-performance CMOS variability in the 65-nm regime and beyond. IBM J. Res. Dev. 50(4/5), 433 (2006)
5. Bolchini, C., Ferrandi, P., Lanzi, P.L., Salice, F.: Evolving classifiers on field programmable gate arrays: Migrating XCS to FPGAS. J. Syst. Archit. 52(8–9), 516–533 (2006)
Cited by
6 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Self-Awareness in Systems on Chip— A Survey;IEEE Design & Test;2017-12
2. Interpolation in the eXtended Classifier System: An architectural perspective;Journal of Systems Architecture;2017-04
3. Basic Methods;Autonomic Systems;2017
4. Relationship between the components of information technology and product design;Proceedings of the 2017 International Conference on Management Engineering, Software Engineering and Service Sciences - ICMSS '17;2017
5. Augmenting the Algorithmic Structure of XCS by Means of Interpolation;Architecture of Computing Systems – ARCS 2016;2016