A Simple Heterogeneous Redundant Design Method for Finite State Machines on FPGAs-Reference-Cited by-同舟云学术

A Simple Heterogeneous Redundant Design Method for Finite State Machines on FPGAs

Published:2019-06-21 Issue: Volume: Page:453-461
ISSN:2194-5357
Container-title:Advances in Intelligent Systems and Computing
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Author:

Itagawa Takanori,Kamasaka Ryo,Shibata Yuichiro

Publisher

Springer International Publishing

Link

http://link.springer.com/content/pdf/10.1007/978-3-030-22354-0_40

Reference8 articles.

1. Hayek, A., Al-Bokhaiti, M., Borcsok, J.: Design and implementation of an FPGA-based 1oo4-architecture for safety-related system-on-chip. In: Proceedings IEEE 25th International Conference on Microelectronics (ICM), pp. 1–4 (2013)

2. Ichinomiya, Y., Tanoue, S., Ishida, T., Amagasaki, M., Kuga, M., Sueyoshi, T.: Memory sharing approach for TMR softcore processor. In: Reconfigurable Computing: Architectures, Tools and Applications, pp. 268–274. Springer (2009)

3. International Electrotechnical Commission: Functional safety of electrical/electronic/programmable electronic safety related systems. IEC 61508 (2000)

4. Konoura, H., Imagawa, T., Mitsuyama, Y., Hashimoto, M., Onoye, T.: Comparative evaluation of lifetime enhancement with fault avoidance on dynamically reconfigurable devices. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 97(7), 1468–1482 (2014)

5. Lovric, T.: Systematic and design diversity — software techniques for hardware fault detection. In: Dependable Computing — EDCC-1, pp. 307–326. Springer (1994)

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