1. M. H. Najafi, P. Li, D. J. Lilja, W. Qian, K. Bazargan, and M. Riedel, “A reconfigurable architecture with sequential logic-based stochastic computing,” J. Emerg. Technol. Comput. Syst., vol. 13, no. 4, pp. 57:1–57:28, June 2017. [Online]. Available: http://doi.acm.org/10.1145/3060537
2. E. Friedman, “Clock distribution networks in synchronous digital integrated circuits,” Proceedings of the IEEE, vol. 89, no. 5, pp. 665–692, May 2001.
3. Y. Jiang, H. Zhang, H. Zhang, H. Liu, X. Song, M. Gu, and J. Sun, “Design of mixed synchronous/asynchronous systems with multiple clocks,” Parallel and Distributed Systems, IEEE Transactions on, vol. PP, no. 99, pp. 1–1, 2014.
4. A. Alaghi and J. P. Hayes, “Survey of stochastic computing,” ACM Transaction on Embedded Computing, vol. 12, 2013.
5. W. Qian, “Digital yet deliberately random: Synthesizing logical computation on stochastic bit streams,” Ph.D. dissertation, University of Minnesota, 2011.