Performance analysis of heterojunction tunnel FET device with variable Temperature
Author:
Publisher
Springer Science and Business Media LLC
Subject
General Materials Science,General Chemistry
Link
https://link.springer.com/content/pdf/10.1007/s00339-021-04891-1.pdf
Reference46 articles.
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3. S.K. Sinha, S. Chaudhury, Impact of oxide thickness on gate capacitance– a comprehensive analysis on MOSFET, nanowire FET and CNTFET devices. IEEE Trans. Nanotechnol. 12, 958–964 (2013)
4. K.K. Bhuwalka, J. Schulze, I. Eisele, Scaling the vertical tunnel FET with tunnel bandgap modulation and gate workfunction engineering. IEEE Trans. Electron Devices 52(5), 909–917 (2005)
5. S. K.Sinha,and S.Chaudhury,“Simulation and analysis of quantum capacitance in single-gate MOSFET, double-gate MOSFET and CNTFET devices for nanometre regime,”IEEE International Conference CODIS, pp.157–160,2012.
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