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Floating Point CGRA based Ultra-Low Power DSP Accelerator

  • Published:2021-01-22 Issue:10 Volume:93 Page:1159-1171
  • ISSN:1939-8018
  • Container-title:Journal of Signal Processing Systems
  • language:en
  • Short-container-title:J Sign Process Syst

Author:

Prasad RohitORCID,Das SatyajitORCID,Martin Kevin J. M.ORCID,Coussy PhilippeORCID

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Modeling and Simulation,Information Systems,Signal Processing,Theoretical Computer Science,Control and Systems Engineering

Reference37 articles.

1. Balasubramanian, M., & Shrivastava, A. (2020). Crimson: compute-intensive loop acceleration by randomized iterative modulo scheduling and optimized mapping on CGRAs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 39(11), 3300–3310. https://doi.org/10.1109/TCAD.2020.3022015.

2. Bouwens, F., Berekovic, M., Kanstein, A., & Gaydadjiev, G. (2007). Architectural exploration of the adres coarse-grained reconfigurable array. In Proceedings of the 3rd international conference on reconfigurable computing: architectures, tools and applications, ARC’07. http://dl.acm.org/citation.cfm?id=1764631.1764633 (pp. 1–13). Berlin: Springer.

3. Das, S., Martin, K. J., Rossi, D., Coussy, P., & Benini, L. (2018). An energy-efficient integrated programmable array accelerator and compilation flow for near-sensor ultralow power processing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 38(6), 1095–1108.

4. Das, S., Peyret, T., Martin, K., Corre, G., Thevenin, M., & Coussy, P. (2016). A scalable design approach to efficiently map applications on cgras. In 2016 IEEE computer society annual symposium on VLSI (ISVLSI) (pp. 655–660), DOI https://doi.org/10.1109/ISVLSI.2016.54, (to appear in print).

5. Das, S., Rossi, D., Martin, K. J. M., Coussy, P., & Benini, L. (2017). A 142mops/mw integrated programmable array accelerator for smart visual processing. In 2017 IEEE International symposium on circuits and systems (ISCAS). IEEE (pp. 1–4).

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