Synthesizing Hardware from Dataflow Programs-Reference-Cited by-同舟云学术

Synthesizing Hardware from Dataflow Programs

Published:2009-07-11 Issue:2 Volume:63 Page:241-249
ISSN:1939-8018
Container-title:Journal of Signal Processing Systems
language:en
Short-container-title:J Sign Process Syst

Author:

Janneck Jörn W.,Miller Ian D.,Parlour David B.,Roquier Ghislain,Wipliez Matthieu,Raulet Mickaël

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Modeling and Simulation,Information Systems,Signal Processing,Theoretical Computer Science,Control and Systems Engineering

Link

http://link.springer.com/content/pdf/10.1007/s11265-009-0397-5.pdf

Reference9 articles.

1. Bhattacharyya, S. S., Eker, J., Janneck, J. W., Lucarz, C., Mattavelli, M., & Raulet, M. (2009). Overview of the MPEG Reconfigurable Video Coding framework. Journal of Signal Processing Systems (Special Issue on Reconfigurable Video Coding).

2. ISO/IEC FDIS 23002-4 (2009). MPEG video technologies–Part 4: Video Tool Library.

3. Eker, J., & Janneck, J. (2003). CAL language report. Tech. rep., ERL Technical Memo UCB/ERL M03/48, University of California at Berkeley.

4. ISO/IEC FDIS 23001-4 (2009). MPEG systems technologies–Part 4: Codec Configuration Representation.

5. Thomas-Kerr, J., Janneck, J. W., Mattavelli, M., Burnett, I., & Ritz, C. (2007). Reconfigurable Media Coding: Self-describing multimedia bitstreams. In Proceedings of SIPS’07.

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