Downscaling Classical MOSFET
Author:
Publisher
Springer India
Link
http://link.springer.com/content/pdf/10.1007/978-81-322-3625-2_4
Reference8 articles.
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3. Antoniadis DA, Aberg I, Chléirigh CN et al (2006) Continuous MOSFET performance increase with device scaling: the role of strain and channel material innovations. IBM J Res Dev 50(4/5):363–376
4. Dennard RH, Gaensslen FH, Yu H-N et al (1974) Design of ion-implanted MOSFETs with very small physical dimensions. IEEE J Solid-State Circuits SC-9:256–268
5. Kim Y-B (2009) Review paper: challenges for nanoscale MOSFETs and emerging nanoelectronics. Trans Electr Electron Mater 10(1):21
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. 3-D Analytical Modeling of Triple Metal Tri-Gate Graded Channel High-k SON TFET for Improved Performance;Silicon;2019-12-04
2. Impact of channel length, gate insulator thickness, gate insulator material, and temperature on the performance of nanoscale FETs;Journal of Computational Electronics;2018-09-05
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