Author:
Kishore Pinninti,Sridevi P. V.,Babulu K.
Reference9 articles.
1. O.J. Bedrij, Carry-select adder. IRE Trans. Eletron. Comput. Ec 11(3), 340–344 (2005)
2. S. Ram, R.R. Ahamed, Comparison and analysis of combinational circuits using different logic styles. In: IEEE–31661, 4th ICCCNT—2013, Tiruchengode, India-(2013), pp. 157–162
3. A. Morgenshtein, A. Fish, I.A. Wagner, Gate-diffusion input (GDI)—a power efficient method for digital combinational circuits. IEEE Trans. VLSI 10, 566–581 (2002)
4. S. Wairya, R.K. Nagaria, S. Tiwari, Comparative performance analysis of XOR/XNOR function based high-speed CMOS full adder circuits for low voltage vlsi design. Int. J. VLSI Design Commun. Syst. (VLSICS) 3, 221–242 (2012)
5. B. Govindarajal, Computer Architecture and Organization: Design Principles and Applications, 8th edn, pp. 125–135 (Tata Mcgraw Hill Education Private Limited, 2008)
Cited by
6 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Design and Validation of Domino CMOS D Flip Flop at 16nm Regime;2023 3rd International Conference on Advancement in Electronics & Communication Engineering (AECE);2023-11-23
2. Design and compare the HA and FA circuits using Gate Diffusion Input (GDI) technique based on 18 nm FinFET technology for improved power efficiency and performance;2023 IEEE 2nd International Conference on Industrial Electronics: Developments & Applications (ICIDeA);2023-09-29
3. Design of High Performance Adders Using Quantum Dot Cellular Automata (QCA);2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT);2023-07-06
4. Implementation of Braun and Baugh-Wooley Multipliers Using QCA;2023 2nd International Conference for Innovation in Technology (INOCON);2023-03-03
5. Design of Low-Power 10-Transistor Full Adder Using GDI Technique for Energy-Efficient Arithmetic Applications;Circuits, Systems, and Signal Processing;2023-01-07