Parallel design and implementation of Error Diffusion Algorithm and IP core for FPGA

Author:

Yang Pengfei,Wang Quan,Zhang Jiyang

Publisher

Springer Science and Business Media LLC

Subject

Computer Networks and Communications,Hardware and Architecture,Media Technology,Software

Reference18 articles.

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2. Avalon Interface Specifications. Altera Corporation. 2011

3. Avila BT, Lins RD, Oliveira L (2005) A new rotation algorithm for monochromatic images. In Proceedings of the 2005 ACM symposium on Document engineering. ACM: 130–132

4. Guo J, Liu Y, Chang J, Lee J (2013) Efficient halftoning based on multiple look-up tables

5. Huang K, Hu Y, Li X (2011) “Cross-layer optimized placement and routing for FPGA soft error mitigation.” Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE: 1–6

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2. Adaptive Optimization Design of Vector Error Diffusion Algorithm and IP Core for FPGA;2018 IEEE SmartWorld, Ubiquitous Intelligence & Computing, Advanced & Trusted Computing, Scalable Computing & Communications, Cloud & Big Data Computing, Internet of People and Smart City Innovation (SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI);2018-10

3. A Task-Driven Reconfigurable Heterogeneous Computing Platform for Big Data Computing;Big Data;2018

4. Sliced integral histogram: an efficient histogram computing algorithm and its FPGA implementation;Multimedia Tools and Applications;2016-08-15

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