Affiliation:
1. Department of Mechanical Engineering, Indian Institute of Technology, Guwahati, Assam 781039, India
Abstract
Abstract
This paper presents an efficient strategy to perform the assembly stage of finite element analysis (FEA) on general purpose graphics processing units (GPUs). This strategy involves dividing the assembly task using symbolic and numeric kernels, and thereby reducing the complexity of the standard single-kernel assembly approach. Two sparse storage formats based on the proposed strategy are also developed by modifying the existing sparse storage formats with the intention of removing the degrees-of-freedom-based redundancies in the global matrix. The inherent problem of race condition is resolved through the implementation of coloring and atomics. The proposed strategy is compared with the state-of-the-art GPU-based and central processing unit (CPU)-based assembly techniques. These comparisons reveal a significant number of benefits in terms of reducing storage space requirements and execution time and increasing performance (GFLOPS). Moreover, using the proposed strategy, it is found that the coloring method is more effective compared to the atomics-based method for the existing as well as the modified storage formats.
Subject
Industrial and Manufacturing Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications,Software
Reference35 articles.
1. Evolutionary and GPU Computing for Topology Optimization of Structures;Ram;Swarm Evol. Comput.,2017
2. GPU—Based Topology Optimization Using Matrix-Free Conjugate Gradient Finite Element Solver With Customized Nodal Connectivity Storage;Ratnakar,2020
3. SIMP-Based Structural Topology Optimization Using Unstructured Mesh on GPU;Ratnakar,2020
4. GPU Acceleration for FEM-Based Structural Analysis;Georgescu;Arch. Comput. Methods Eng.,2013
Cited by
4 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献