Thermal Fatigue Evaluation Model of a Microelectronic Chip in Terms of Interfacial Singularity

Abstract

Abstract Thermal fatigue failure of microelectronic chip often initiates from the interface between solder and substrate, and the service life of the chip is largely dependent on the singular stress–strain at this interface. To provide a reasonable life evaluation method, three thermal fatigue evaluation models, including strain-based and stress–strain based, have been established in terms of the interfacial singular fields. Thermal fatigue lives of different chips under different thermal cycles are obtained by thermal fatigue tests, and the stress and strain intensity factors and singular orders at the solder/substrate interface are computed at the same conditions, to determine the material constants in the established models. The thermal fatigue lives predicted are in acceptable agreement with the experimental results. What is more, the application of these thermal fatigue models demonstrates a fact that the thermal fatigue of the microelectronic chips can be evaluated uniformly no matter what the shapes, dimensions of the chip, and the thermomechanical properties of the solders are, as long as the relevant stress–strain intensity factors and singular orders are obtained.