Fault Detection and Accommodation in Real Time Embedded Full Authority Digital Electronic Engine Controls

Abstract

Fault Detection and Accommodation Logic easily occupies at least fifty percent of the real time embedded software application program in the contemporary Full Authority Digital Electronic Engine Control (FADEC). Indeed, if a layman were to look at the logic distribution in a FADEC he might think the main purpose of the FADEC was to detect failures! This, of course, is not the case. It is true, however, that real world applications must be programmed to deal with the inevitable fact that system failures will occur. The success of the application program then depends not only on how well it controls the engine, but how well it detects, isolates and accommodates failures. In other words, the fault tolerance of an application is just as important as the robustness of the control algorithms. Over the past two decades many basic Fault Detection and Accommodation (FDA) techniques have been developed and have become commonplace in FADECs. These techniques have been developed in such a way as to maximize an application’s Built In Test (BIT) effectiveness for both “hard”, “soft”, and intermittent failures, while minimizing failure annunciation due to “false alarm” events. These techniques have been implemented in both hardware and software. This paper will present and discuss these basic FDA techniques for input signals, output signals, processors, memory devices and communication devices. Many of the newer FDA techniques will also be discussed. An overview of the key components of FDA, and the established “norms” for effective FDA will be added for completeness. Since the structure of FDA is dependent upon system architecture, the system under consideration is chosen as the Dual-Channel Full Authority Digital Electronic Engine Control. This is the configuration that is most commonly used in commercial and military engine control applications.