Effect of Package and Board Pad Size on Optimum Flip Chip Ball Grid Array (FCBGA) Package Thermo-Mechanical Performance

Author:

Wong Chee Wai1,Tay Cheng Siew1,Tan Siew Sang2,Vasudevan Vasu3,Goh Eng Huat2,Wong Shaw Fong2

Affiliation:

1. Intel Products, Penang, Malaysia

2. Intel Technology

3. Intel Corporation

Abstract

Flip Chip Ball Grid Array (FCBGA) has been a common package technology to achieve higher Input/Output (IO) count. In moving toward higher IO count without increasing the package size, FCBGA package with tighter pitch is required. Unfortunately, ball pitch reduction from 1.27mm to 1mm in FCBGA packages is not a transparent change. Instead, it provides an inside into the thermo-mechanical performance of FCBGA solder joint. Previous study indicated the importance of the package solder resist opening-to-board pad size ratio (AR) as the dominant factor in improving the thermo-mechanical performance of the solder joint at one solder system. An optimum range of AR had been defined as failure free zone with respect to the temperature cycling stress from −40degC to 85degC. This paper is a continued study, which focused on identifying the optimum range of AR for failure free zone. Key factors under the study are package solder resist opening (SRO), die size, population pattern, type of board pad, type of package design and thermal solution. This paper consolidates the modeling and empirical data on the relationship. The results of the study has brought towards an identification of process window for 1mm pitch FCBGA package and led to package and board design rules in terms of targeted SRO & board pad size, type of pad design and a tightening of SRO & board pad size specification. Besides, the learning has led towards a new look into the BGA package certification in which SRO and board pad size are key factors in the design consideration.

Publisher

ASMEDC

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