Mechanical Design and Analysis of Land Grid Array (LGA) Sockets

Author:

Pandey Vinayak1,Subramanian Sankara1,Rangaraj Sudarshan1,Byquist Tod1

Affiliation:

1. Intel Corporation, Chandler, AZ

Abstract

Sockets offer a cost effective and high-volume manufacturing friendly interface between CPU packages and motherboards. Land-grid-array (LGA) technology offers avenues to enhance the electrical performance of sockets over its predecessors e.g. pin grid array (PGA) technology. The present paper will describe various technical challenges encountered in the design of Intel’s LGA sockets. The recently launched LGA775 socket will be used as a case study. Methods adopted to overcome these design challenges and successfully implement LGA sockets will be discussed. Design features like direct socket loading (DSL), various issues related to the design of socket housings, LGA contact design optimization and socket reliability enhancement under stresses such as thermal cycling, mechanical shock, vibration and bake will be discussed. DSL is an integrated mechanism that enables application of a compressive mechanical load between the LGA contact pins on the socket and the package LGA pads, so that their interfaces achieve and maintain electrical continuity through the socket design life. Similarly, optimizing the design of the socket contacts significantly impacts the stressing, reliability of the second level interconnect (SLI) ball grid array (BGA) that connects the LGA775 to the motherboard. The successful implementation of these designs is achieved through a combination of geometric tolerance stack analysis, numerical modeling studies, detailed experiments, reliability testing and correlation between these. The details of the same are be discussed in this article.

Publisher

ASMEDC

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Liquid Metal Interconnects for High Pin Count Scaling and Socketing Applications;IEEE Transactions on Components, Packaging and Manufacturing Technology;2023

2. Structural Design of Land Grid Array Loading Mechanisms for Intel Central Processor Unit Stack Retention;Journal of Electronic Packaging;2019-02-25

3. Dense and Highly Elastic Compressible MicroInterconnects (CMIs) for Electronic Microsystems;2017 IEEE 67th Electronic Components and Technology Conference (ECTC);2017-05

4. Determining LGA Contact Design Specifications by Investigating Sensitivity of LGA Contact Performance to LGA Contact Geometric Tolerance;Electronic and Photonic Packaging, Electrical Systems Design and Photonics, and Nanotechnology;2006-01-01

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