Improved Packaging Design for Maximizing the Thermal Performance of Multifinger Collector-Up HBTs-Reference-Cited by-同舟云学术

Improved Packaging Design for Maximizing the Thermal Performance of Multifinger Collector-Up HBTs

Published:2011-03-01 Issue:1 Volume:133 Page:
ISSN:1043-7398
Container-title:Journal of Electronic Packaging
language:en
Short-container-title:

Author:

Tseng Hsien-Cheng¹

Affiliation:

1. Department of Electronic Engineering and Nanotechnology, R&D Center, Kun Shan University, Tainan, Taiwan 71003, R.O.C.

Abstract

Advanced collector-up (C-up) heterojunction bipolar transistors (HBTs) with the thermal-via configuration (TVC) have been analyzed using a genetic algorithm (GA). Novel packaging structures are presented and evaluated in detail. With careful optimization, the thermal performance can be maximized by improving the thermal resistance over 40%, and the conventional TVC can be further reduced by 35%. The proposed approach is demonstrated on the multifinger InGaP/GaAs C-up HBT, which is attractive as the active component in power amplifiers. A comparison of measured, finite-element-calculated, and GA-extracted results has been made. Consequently, it is shown that the remarkable thermal management can be achieved with a miniature heat-dissipation design, and the thermally stable InGaP/GaAs C-up HBT should be feasible for implementation in intelligent wireless communication systems.

Publisher

ASME International

Subject

Electrical and Electronic Engineering,Computer Science Applications,Mechanics of Materials,Electronic, Optical and Magnetic Materials

Link

http://asmedigitalcollection.asme.org/electronicpackaging/article-pdf/doi/10.1115/1.4003515/5884788/014501_1.pdf

Reference14 articles.

1. Heterostructure Bipolar Transistors and Integrated Circuits;Kroemer;Proc. IEEE

2. Self-Aligned AlGaAs/InGaAs/GaAs Collector-Up Heterojunction Bipolar Transistors for Microwave Applications;Chang;IEEE Trans. Electron Devices

3. A Ka-Band Power MMIC;Kobiki;IEEE Microwave and Millimeter-Wave Monolithic Circuits Symp. Dig.

4. Okaniwa, K., Ishikawa, T., Komaru, M., Notani, Y., Kobiki, M., Mitsui, Y., Orisaka, S., and Nishitani, K., 1990, “A Novel FET Structure of Buried Plated Heat Sink for Superior High Performance GaAs MMICs,” IEEE GaAs IC Symp. Dig., 12th Annual, pp. 233–236.

5. Novel HBT With Reduced Thermal Impedance;Hill;IEEE Microw. Guid. Wave Lett.