Current Development Status of “Optical I/O Core”
Author:
Affiliation:
1. Photonics Electronics Technology Research Association (PETRA)
Publisher
Japan Institute of Electronics Packaging
Subject
Electrical and Electronic Engineering
Link
https://www.jstage.jst.go.jp/article/jiep/20/5/20_345/_pdf
Reference15 articles.
1. 1) Y. Arakawa, et al.: “Silicon photonics for next generation system integration platform,” IEEE Commun. Mag., Vol. 51, No. 3, pp. 72-77, March 2013
2. 2) K. Yashiki, et al.: “25-Gbps/ch error-free operation over 300-m MMF of low-power-consumption silicon-photonics-based chip-scale optical I/O cores,” IEICE Trans. Electron., Vol. E99-C, No. 2, pp. 148-156, February 2016
3. 3) K. Kurata, et al.: “Silicon photonics for multi-mode transmission,” in Optical interconnects for data centers, T. Tekin, R. Pitwon, A. Håkansson, and N. Pleros, Eds., Elsevier, 2016, pp. 197-222
4. 4) X. Chen, et al.: “25 Gb/s transmission over 820 m of MMF using a multimode launch from an integrated silicon photonics transceiver,” Opt. Express, Vol. 22, No. 2, pp. 2070-2077, January 2014
5. 5) T. Uemura, et al.: “125-μm-pitch × 12-channel ‘Optical Pin’ array as I/O structure for novel miniaturized optical transceiver chips,” Proc. 65th Electron. Compon. Technol. Conf. (ECTC), pp. 1305-1309, San Diego, May 2015
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