The Dry Ashing and Etching Technology for Advanced Packaging
Author:
Affiliation:
1. Semiconductor & Advanced Electronics Equipment Division, ULVAC Inc.
2. Advanced Technology Institute, ULVAC Inc.
Publisher
Japan Institute of Electronics Packaging
Subject
Electrical and Electronic Engineering
Link
https://www.jstage.jst.go.jp/article/jiep/24/6/24_536/_pdf
Reference2 articles.
1. 1) D. Hironiwa, C. Zuo, Y.-C. Hsieh, T. Suzuki, Y. Morikawa, and R. Kamimura: "Fabrication of fine patterned structure for high-density Fan-Out Wafer Level Package using dry etching technology," Proc. International Conference on Electronic Packaging Technology (ICEPT), pp. 1–5, 2020
2. 2) Y. Morikawa, D. Hironiwa, and T. Murayama: "PI Fine-via Etching and Low-damage Surface-modification Process For High-density Fan-Out Wafer Level Package," Proc. Electronic Components and Technology Conference (ECTC), pp. 900–905, 2020
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