Affiliation:
1. Departamento Arquitectura de Computadores y Automática, Facultad de Ciencias Físicas - Desp. 230, Universidad Complutense de Madrid, Spain
2. Departamento de Informática de Sistemas y Computadores, Universitat Politècnica de València, Spain
Abstract
Malleability is defined as the ability to vary the degree of parallelism at runtime, and is regarded as a means to improve core occupation on state-of-the-art multicore processors tshat contain tens of computational cores per socket. This property is especially interesting for applications consisting of irregular workloads and/or divergent executions paths. The integration of malleability in high-performance instances of the Basic Linear Algebra Subprograms (BLAS) is currently nonexistent, and, in consequence, applications relying on these computational kernels cannot benefit from this capability. In response to this scenario, in this paper we demonstrate that significant performance benefits can be gathered via the exploitation of malleability in a framework designed to implement portable and high-performance BLAS-like operations. For this purpose, we integrate malleability within the BLIS library, and provide an experimental evaluation of the result on three different practical use cases.
Funder
Generalitat Valenciana
Comunidad de Madrid
Ministerio de Ciencia, InnovaciÃ&z.hfl;Ân y Universidades
Universidad Complutense de Madrid
Subject
Hardware and Architecture,Theoretical Computer Science,Software
Cited by
1 articles.
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1. Malleability techniques applications in high-performance computing;The International Journal of High Performance Computing Applications;2024-03