OMEGA: A reconfigurable transputer-based digital simulator

Abstract

This paper describes a high performance digital simulator which is novel both in its design and its implementation. The basic simulator comprises 32 identical processing elements (PEs) interconnected through a global switch in a non-blocking arrange ment; each PE is a transputer and support circuitry configured in an unusual way. The processors operate with floating point arithmetic to avoid the problems of scaling, and a frame time of 0.1 msec., irrespective of problem size or complexity. The performance of the simulator has been validated using PEs to realize both linear and non-linear functions in a variety of simulations.