Implementation of a Digitally Controlled MOS based Tuned Reconfigurable Filter for High Frequency Applications

Abstract

ith the advent of recent standard of high data rate communication standards, the systems need to meet the requirement of multi-frequency processing. Moreover to achieve backward and forward compatibility across communication standards, reconfigurable and tunable designs are preferred. This paper proposes a fully digital reconfigurable all pass filter (APF) with a tunable passband to meet such requirements. The reconfigurable APF is capable of band tuning using a digital current control source (DCCS) which uses a digital word count making it most effective and simple reconfigurable design than the already reported designs. This can be widely used in different systems, e.g., 5G receivers, radar communication, cyber security, sensor interfaces, etc. This APF is also connected to Schmitt trigger inverter for smooth communication. Moreover, the circuit is designed to be inductor less thus making the design area efficient and suitable for wide range of applications and systems. The proposed design is simulated using 65 nm GPDK CMOS technology that achieves a wideband range of 0.1-15 GHz and achieves a bandwidth of 12.6 GHz with a gain of 15.5dB with a time delay of 1.62ps. The static power consumption of the circuit is only 2.52mW.