Design and Performance Analysis of RNS-Based Reconfigurable FIR Filter for Noise Removal in Speech Signals Applications

Abstract

In DSP solutions, the Residual Number System with Two's Complement systems is the most commonly utilized system for building low-power and high-throughput programmable Finite Impulse Response filters. It would be done by creating FIR filters in the Residual Number organization and 2's Enhance scheme by comparing the results to the current assert. The RNS based on FIR filter architecture reduces power consumption while allowing the device to operate at 150 MHz without increasing its size significantly. In case of memory and latency reduction, the implementations of the Residual Number System and 2's Complement System must be able to obtain and decode signals with fewer physical servers for every clock signal. The principal idea of this proposed model is to provide data bits with larger sizes for RNS-based multiplier and delayed wavelet LMS (DWLMS) that operates at speed high with premised reconfigurable FIR via forward and reverse conversions that don't produce as much power output and size as reflective thinking. The Application Specific Integrated Circuit will be designed and integrated for 32 nm technology. The proposed design addresses the four essential parameter optimization, such as power, area, and timing, using the Residual Number System, which is superior to Two's Complement System. According to the findings, there is a 13 percent reduction in power, a 21 % enhancement in area, and a 13 % enhance in throughput.