A TCAD Compatible SONOS Trapping Layer Model for Accurate Programming Dynamics
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9439548/9439588/09439598.pdf?arnumber=9439598
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Modeling the Operation of Charge Trap Flash Memory–Part I: The Importance of Carrier Energy Relaxation;IEEE Transactions on Electron Devices;2024-01
2. Modeling the Operation of Charge Trap Flash Memory—Part II: Understanding the ISPP Curve With a Semianalytical Model;IEEE Transactions on Electron Devices;2024-01
3. Simulation of Optimum Stored Charge in SONOS FLASH Memory using Silvaco TCAD;2022 6th International Conference on Devices, Circuits and Systems (ICDCS);2022-04-21
4. TCAD simulation for capture / emission of carriers by traps in SiN: trap-assisted tunneling model extended for capture of carriers injected via Fowler-Nordheim tunneling;Japanese Journal of Applied Physics;2021-12-14
5. Understanding the ISPP Slope in Charge Trap Flash Memory and its Impact on 3-D NAND Scaling;2021 IEEE International Electron Devices Meeting (IEDM);2021-12-11
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