Nonvolatile and Robust Design of Content Addressable Memory Cell Using Magnetic Tunnel Junction at Nanoscale Regime
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/20/7330079/07153542.pdf?arnumber=7153542
Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Power Optimization of KNN Algorithm Based on FPGA;2021 4th International Iraqi Conference on Engineering Technology and Their Applications (IICETA);2021-09-21
2. A Novel Multi-Context Non-Volatile Content-Addressable Memory Cell and Multi-Level Architecture for High Reliability and Density;2021 IEEE 10th Non-Volatile Memory Systems and Applications Symposium (NVMSA);2021-08-18
3. Design of low power, variation tolerant single bitline 9T SRAM cell in 16-nm technology in subthreshold region;Microelectronics Reliability;2021-05
4. Architecture of resistive RAM with write driver;Solid State Electronics Letters;2020-12
5. Variation resilient reliable design of trigger pulse generator;IET Circuits, Devices & Systems;2020-09
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