A Look-Ahead Clock Gating Based on Auto-Gated Flip-Flops

Author:

Wimer Shmuel,Albahari Arye

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 14 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A light-weight neuromorphic controlling clock gating based multi-core cryptography platform;Microprocessors and Microsystems;2024-04

2. Hybrid Data Driven Clock Gating and Data Gating Technique for Better Saving Power in ALU RISC-V;International Journal of Electrical and Electronics Research;2024-03-20

3. A Comparative Study of D-Type Flip-Flop Architecture Using 90-nm and 45-nm CMOS Technology for High-Performance and Low-Power Systems;2024 IEEE Conference on Computer Applications (ICCA);2024-03-16

4. Comparative Analysis of Data Compression using Canonical Huffman and Golomb Rice Encoding in Verilog HDL and Implementation in FPGA;2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT);2023-07-06

5. Low-Power Redundant-Transition-Free TSPC Dual-Edge-Triggering Flip-Flop Using Single-Transistor-Clocked Buffer;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-05

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