Author:
Golander Amit,Levison Nadav,Heymann Omer,Briskman Alexander,Wolski Mark J.,Robinson Eric F.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
7 articles.
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1. Networks-on-Chip With Double-Data-Rate Links;IEEE Transactions on Circuits and Systems I: Regular Papers;2017-12
2. Efficient Utilization of Shared Caches in Multicore Architectures;Arabian Journal for Science and Engineering;2016-06-03
3. A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors;Proceedings of the 26th edition on Great Lakes Symposium on VLSI;2016-05-18
4. L1–L2 Interconnect Design Methodology and Arbitration in 3-D IC Multicore Compute Clusters;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2014-10
5. Introduction to Network-on-Chip Design;Microarchitecture of Network-on-Chip Routers;2014-07-16