A 0.034% Charge-Imbalanced Neural Stimulation Front-End (SFE) IC With on-Chip Voltage Compliance Monitoring Circuit and Analysis on Resting Potential by Utilizing the SFE IC-Reference-Cited by-同舟云学术

A 0.034% Charge-Imbalanced Neural Stimulation Front-End (SFE) IC With on-Chip Voltage Compliance Monitoring Circuit and Analysis on Resting Potential by Utilizing the SFE IC

Published:2019-10 Issue:10 Volume:66 Page:3797-3810
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Jeon Yong-Joon^ORCID,Yao Lei,Gao Yuan^ORCID,Arasu Muthukumaraswamy Annamalai

Funder

National Research Foundation Singapore

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8919/8851328/08746790.pdf?arnumber=8746790

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4. Energy-Efficient Power Management Interface with Adaptive HV Multimode Stimulation for Power-Sensor Integrated Patch-Type Systems;IEEE Transactions on Biomedical Circuits and Systems;2023

5. A 4-Channel Neural Stimulation IC Design with Charge Balancing and Exponential Current Output;2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2022-11-11