On the Robustness of Look-Up Table Digital Predistortion in the Presence of Loop Delay Error-Reference-Cited by-同舟云学术

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On the Robustness of Look-Up Table Digital Predistortion in the Presence of Loop Delay Error

Published:2012-10 Issue:10 Volume:59 Page:2432-2442
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Liu You-Jiang,Lu Bin,Cao Tao,Zhou Bang-Hua,Zhou Jie,Liu Yi-Nong

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/8919/6313475/06148314.pdf?arnumber=6148314

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Loop Delay Estimation Algorithm Based on Sliding Window in Digital Predistortion Systems;2023 3rd International Symposium on Computer Technology and Information Science (ISCTIS);2023-07-07

2. A low complexity loop‐delay estimation algorithm based on sliding window for power amplifier characterization;Microwave and Optical Technology Letters;2023-02-10

3. Efficient Signal Alignment Algorithm for Undersampling Digital Predistortion;IEEE Microwave and Wireless Components Letters;2022-12

4. Adaptive Deep Learning Aided Digital Predistorter Considering Dynamic Envelope;IEEE Transactions on Vehicular Technology;2020-04

5. A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of Power Amplifiers: Theory and FPGA Validation;IEEE Transactions on Circuits and Systems I: Regular Papers;2018-09

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